Reliability becomes a big concern for modern VLSI chips, due to the shrinking lithography, new material, and design complexity, etc. The major causes of reliability failures include electro-migration (modeled as resistive bridges), gate oxide breakdown (resistive shorts), hot carrier injection (delay faults), etc. Most of the reliability failures will cause the chip to degrade or slow down, and eventually the chip will stop functioning. Therefore, there is a need to monitor and predict the reliability of a chip in the field. So far, there is no on-line reliability monitor once the chip is shipped. Therefore, the degradation of a chip cannot be monitored. This embodiment teaches a new solution for this problem.